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DESCRIPTION dans le DATA SHEET du 4021
CD4021B series types are 8-stage parallel- or serial-input/serial output registers having common CLOCK and
PARALLEL/SERIAL CONTROL inputs, a single SERIAL data input, and individual parallel "JAM" inputs to each
register stage. Each register stage is a D-type, master-slave flip-flop. In addition to an output from stage 8, "Q"
outputs are also available from stages 6 and 7. Parallel as well as serial entry is made into the register
synchronously with the positive clock line transition in the CD4014B. In the CD4021B serial entry is synchronous
with the clock but parallel entry is asynchronous. In both types, entry is controlled by the PARALLEL/SERIAL
CONTROL input. When the PARALLEL/SERIAL CONTROL input is low, data is serially shifted into the 8-stage
register synchronously with the positive transition of the clock line. When the PARALLEL/SERIAL CONTROL
input is high, data is jammed into the 8-stage register via the parallel input lines and synchronous with the
positive transition of the clock line. In the CD4021B, the CLOCK input of the internal stage is "forced" when
asynchronous parallel entry is made. Register expansion using multiple packages is permitted.
The CD4021B series types are supplied in 16-lead hermetic dual-in-line ceramic packages (D and F suffixes),
16-lead dual-in-line plastic packages (E suffix), and in chip form (H suffix

@Aoineko si tu me fait une rom test shinobi ca serait bien !!